SemiAnalysis published AgentX on 24 August, a benchmark that replays recorded coding-agent sessions on production inference stacks rather than firing fixed-length prompts at them. On GLM 5.3 running through open-source SGLang, Nvidia hardware showed up to a fivefold cost-efficiency advantage over AMD at 150 output tokens per second per user. By SemiAnalysis's arithmetic, even if the competing accelerators were handed over free, the resulting cost per token would still come out higher once hosting and electricity are counted. That is one configuration rather than a market verdict, but it is a configuration built to resemble what agents actually do.
The range underneath the headline figure matters more than the top of it. In the published B200 versus MI355X comparison on the same model, the advantage moved with interactivity: roughly 57% at 108 output tokens per second per user, and 247% at 141. Same two chips, same model, 33 tokens per second apart, and the gap more than quadruples. "Up to five times" is the ceiling of a curve whose floor is well under two.
AgentX is a replay tool, not a request generator. SemiAnalysis stood up an intermediate server that intercepted its employees' requests to Claude Code and Codex and collected a corpus of more than 8,000 sessions totaling 610 billion tokens. The open 1.0 release contains 393 Claude Code sessions under Apache 2.0. The original content is converted into linked blocks with 64-token hashes bound to a single session, which preserves the prefix relationships that cache reuse depends on while stripping out the original prompts and code.
The shape of that traffic is the whole point of the exercise. Median input length is 142,000 tokens. Median output is 444. Between turns, the agent waits on a tool for an average of 3.84 seconds. In 175 of the 393 sessions, the agent spawns at least one subagent. A conventional fixed-shape benchmark — 8,000 input tokens, 1,000 output — exercises none of that.
Where the gap comes from is mostly memory behavior. An agent session tests whether reusable key-value state stayed in high-bandwidth memory or fell to the offload tier, and then whether the serving system can route the next turn to wherever that state lives. On DeepSeek V4 at 384 concurrent sessions, SemiAnalysis measured 91% of lookups hitting high-bandwidth memory and a further 1.36% hitting host RAM, running vLLM on a B300 configuration with 3 TB of DRAM and eight-way expert-parallel decoding. On B200 with the same engine, at concurrency 196 rather than 384, the hit rate fell to 73%, with another 20% covered by host memory. As user counts rise, SemiAnalysis says, that dependence on offload drives latency up sharply.
The second source of advantage is tokenization. Nvidia's TensorRT-LLM added incremental, boundary-aware tokenization: when a conversation resends its entire history, the system no longer has to tokenize the whole thing again. On a Qwen 3.5 trace the mode matched full tokenization on all 1,087 transitions checked, and mean processing time per turn dropped from 185.1 milliseconds to 11.3. A fixed-length benchmark cannot show that gain, because it has no previous turn to reuse.
AgentX does record places where AMD wins. The ATOM engine beats a GB300 NVL72 rack running vLLM on price-performance across part of the Kimi K3 curve, in the 40-to-60-second latency band. On DeepSeek V4, MI355X with SGLang held level with B200 on vLLM until 21 August, when optimizations from Inferact and Nvidia landed in the main branch — though B300 with vLLM and B200 with SGLang were already ahead of that result before the merge.
What blunts the ATOM result is deployment. SemiAnalysis says ATOM is barely used in production outside a single advertising division at Alibaba, and that the core Qwen team does not use it either, which is why the firm treats stock vLLM as the comparison a customer should care about. On matched open stacks the picture gets worse for AMD: running Qwen 3.5 through SGLang on both platforms, Nvidia leads by more than 20 times at 90 output tokens per second per user. SemiAnalysis also notes that the vLLM feature support table lists no AMD server components for context parallelism, the strategy long contexts lean on most.
That is the structural finding buried under the multipliers: a large share of Nvidia's lead now sits in software. AgentX attributes it to compute kernels, cache management, routing and scheduling — components that iterate far faster than a manufacturing process node.
The 21 August reversal is the most instructive number in the package, and it is a date rather than a multiplier. A configuration that matched B200 stopped matching it because code merged into a main branch. A benchmark whose rankings move inside a week is measuring software velocity at least as much as hardware capability, and software velocity is a legitimate thing to measure — Nvidia has more engineers pointed at vLLM, SGLang and TensorRT-LLM than AMD does, and that is a durable advantage that no fab schedule erases. But it is a different claim from "the hardware is five times better," and the headline number invites the second reading. SemiAnalysis has already scheduled an AgentX refresh within a month, which is an admission that any single snapshot expires.
The premise is also doing heavy lifting. SemiAnalysis holds that long multi-turn agent sessions already account for the bulk of production request flow to inference systems, and that claim is what elevates AgentX from one benchmark among many to the benchmark that counts. It is also the only assertion in the release with no measurement attached. The corpus, meanwhile, is SemiAnalysis's own staff using Claude Code and Codex — the firm says so plainly in its limitations, noting that coding tools inject unusually large context and that a simpler tool would produce a different input distribution. A 142,000-token median input is what agentic coding looks like. It is not self-evidently what the world's inference demand looks like.
The other caveats are handled openly. Anonymized hash blocks are filled with synthetic tokens on replay, which distorts acceptance under speculative decoding, so SemiAnalysis does not measure that live and instead fixes acceptance length from SPEED-Bench. The harness runs closed-loop, so a faster configuration processes more requests and ends up with a slightly different workload mix, an effect strongest at low concurrency. Meta, Microsoft, Oracle, OpenAI and several Chinese labs are named as backers of the broader InferenceX effort, alongside contributions from Nvidia and AMD engineers, which SemiAnalysis is careful to say does not imply endorsement of any particular comparison. Google TPUs are absent from the matrix entirely; Nvidia's Rubin generation arrives later in August, and TPUs and AMD's MI455X are expected later in 2026. This is Blackwell against CDNA 4 and nothing newer.
For buyers, the transferable part is not the multipliers but the two questions SemiAnalysis suggests putting to a vendor — and it flags this as advice rather than benchmark output. First, the prefix cache hit rate at production concurrency, and the host memory available per accelerator; its estimate is that end-to-end offload to host DRAM works best when that tier holds 1.5 to 3 times the capacity of the high-bandwidth cache. Second, session routing: whether the provider pins a session to the worker node holding its prefix, or spreads load across nodes and forces the system to reprocess the prefix every turn. Both can be written as measurable commitments, which is more useful than a tokens-per-second figure that says nothing about turn 40.
For AMD, the route out runs through software rather than silicon. Move more of ATOM's work into vLLM and SGLang, fix long-context parallelism and the offload path, and AgentX suggests much of the current deficit closes. The benchmark offers no estimate of how long that takes. Buyers who spent two years waiting for a second supplier to put pressure on Nvidia's prices are now being told the gap is closeable in code they do not write, on a schedule nobody has committed to.